5 endianness considerations – Texas Instruments TMS320DM643X DMP User Manual

Page 13

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Peripheral Architecture

2.4.3

Data Format

The UART transmits in the following format:

1 START bit + data bits (5, 6, 7, 8) + 1 PARITY bit (optional) + STOP bit (1, 1.5, 2)

It transmits 1 START bit; 5, 6, 7, or 8 data bits, depending on the data width selection; 1 PARITY bit, if
parity is selected; and 1, 1.5, or 2 STOP bits, depending on the STOP bit selection.

The UART receives in the following format:

1 START bit + data bits (5, 6, 7, 8) + 1 PARITY bit (optional) + STOP bit (1)

It receives 1 START bit; 5, 6, 7, or 8 data bits, depending on the data width selection; 1 PARITY bit, if
parity is selected; and 1 STOP bit.

The protocol formats are shown in

Figure 4

Figure 4. UART Protocol Formats

D0

D1

D2

D3

D4

PARITY

STOP1

Transmit/Receive for 5-bit data, parity Enable, 1 STOP bit

D0

D1

D2

D3

D4

D5

PARITY

STOP1

Transmit/Receive for 6-bit data, parity Enable, 1 STOP bit

D0

D1

D2

D3

D4

D5

D6

PARITY

STOP1

Transmit/Receive for 7-bit data, parity Enable, 1 STOP bit

D0

D1

D2

D3

D4

D5

D6

D7

PARITY

STOP1

Transmit/Receive for 8-bit data, parity Enable, 1 STOP bit

2.5

Endianness Considerations

Since the UART transfers 8-bit data externally, and proper endianness is maintained automatically within
the DM643x DMP, there are no endianness considerations when using the DM643x UART peripheral.

13

SPRU997C – December 2009

Universal Asynchronous Receiver/Transmitter (UART)

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