Transcend Information SSD25S User Manual
Page 15
T
T
T
S
S
S
8
8
8
G
G
G
S
S
S
S
S
S
D
D
D
2
2
2
5
5
5
S
S
S
-
-
-
S
S
S
T
T
T
S
S
S
1
1
1
6
6
6
G
G
G
S
S
S
S
S
S
D
D
D
2
2
2
5
5
5
S
S
S
-
-
-
S
S
S
/
/
/
M
M
M
T
T
T
S
S
S
3
3
3
2
2
2
G
G
G
S
S
S
S
S
S
D
D
D
2
2
2
5
5
5
S
S
S
-
-
-
S
S
S
/
/
/
M
M
M
T
T
T
S
S
S
6
6
6
4
4
4
G
G
G
S
S
S
S
S
S
D
D
D
2
2
2
5
5
5
S
S
S
-
-
-
S
S
S
/
/
/
M
M
M
T
T
T
S
S
S
1
1
1
2
2
2
8
8
8
G
G
G
S
S
S
S
S
S
D
D
D
2
2
2
5
5
5
S
S
S
-
-
-
M
M
M
T
T
T
S
S
S
1
1
1
9
9
9
2
2
2
G
G
G
S
S
S
S
S
S
D
D
D
2
2
2
5
5
5
S
S
S
-
-
-
M
M
M
2.5” Solid State Disk
Transcend Information Inc.
V1.08
15
Description:
1. Host/device power-off - Host and device power-off.
2. Power is applied - Host side signal conditioning pulls TX and RX pairs to neutral state (common mode voltage).
3. Host issues COMRESET
4. Host releases COMRESET. Once the power-on reset is released, the host releases the COMRESET signal and puts
the bus in a quiescent condition.
5. Device issues COMINIT – When the device detects the release of COMRESET, it responds with a COMINIT. This is
also the entry point if the device is late starting. The device may initiate communications at any time by issuing a COMINIT.
6. Host calibrates and issues a COMWAKE.
7. Device responds – The device detects the COMWAKE sequence on its RX pair and calibrates its transmitter (optional).
Following calibration the device sends a six burst COMWAKE sequence and then sends a continuous stream of the
ALIGN sequence starting at the device's highest supported speed. After ALIGN
P
primitives have been sent for 54.6 us
(2048 nominal Gen1 Dword times) without a response from the host as determined by detection of ALIGN
P
primitives
received from the host, the device assumes that the host cannot communicate at that speed. If additional speeds are
available the device tries the next lower supported speed by sending ALIGN
P
primitives at that rate for 54.6 us (2048
nominal Gen1 Dword times.) This step is repeated for as many slower speeds as are supported. Once the lowest speed
has been reached without response from the host, the device shall enter an error state.
8. Host locks – after detecting the COMWAKE, the host starts transmitting D10.2 characters at its lowest supported rate.
Meanwhile, the host receiver locks to the ALIGN sequence and, when ready, returns the ALIGN sequence to the device at
the same speed as received. A host shall be designed such that it acquires lock in 54.6 us (2048 nominal Gen1 Dword
times) at any given speed. The host should allow for at least 873.8 us (32768 nominal Gen1 Dword times) after detecting
the release of COMWAKE to receive the first ALIGN
P
. This insures interoperability with multi-generational and
synchronous designs. If no ALIGN
P
is received within 873.8 us (32768 nominal Gen1 Dword times) the host restarts the
power-on sequence – repeating indefinitely until told to stop by the Application layer.
9. Device locks – the device locks to the ALIGN sequence and, when ready, sends the SYNC
P
primitive indicating it is
ready to start normal operation.
10. Upon receipt of three back-to-back non-ALIGN
P
primitives, the communication link is established and normal operation
may begin.
ATA command register
This table with the following paragraphs summarizes the ATA command set.