Xilinx EDK 9.2I - Manual (Page 11)

Getting Started with EDK www.xilinx.com 11
EDK 9.2i
Other Information R
XPS and SDK Online Help
Online help is available from the XPS and SDK GUIs.
Other Information
Migrating Old Projects
The IP Core Version Management Wizard migrates older projects to the current version of
XPS. It will point out changes to the cores, and in some cases, help you upgrade to newer
revisions of cores currently in your project.
Example User Constraint Files (UCFs)
There are some IPs, such as the PLB RapidIO LVDS and the OPB PCI, which need certain
example UCFs to be available in your project area. When such IPs are used in an EDK
project, tools give out the following ALERT message:
An example UCF is available for this core and must be modified for use
in the system. Please refer to the EDK Getting Started guide for the
location of this file.
The UCF file for the IP can be found at:
$XILINX_EDK/hw/XilinxProcessorIPLib/pcores/peripheral_name/data/
where $XILINX_EDK is the installation area.
Setting Up the Simulation Environment
For simulation of embedded designs, you must set up your simulation environment. This
is required every time you install a new release or a service pack of EDK. For information
about setting up simulation environments, refer to the XPS Help.
Third Party Tool Requirements
EDK tools support ModelSim PE/SE & NCSim LDV/IUS versions as supported by ISE 9.2i
tools. The verification of EDK tools and processor IP is done using:
• Modelsim SE/PE 6.1e
• NCSim IUS 5.8 or later (NCSim 5.8 is not available on Windows)
Using EDK with ChipScope Pro
EDK enables hardware designers to create processor systems rapidly using the
Chipscope™ Pro CoreConnect Bus Analyzer cores and the Virtual IO (VIO) core. EDK
supports the following ChipScope Pro cores:
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chipscope_icon
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chipscope_plbv46_iba
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chipscope_ila
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chipscope_vio
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chipscope_plb_iba
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chipscope_opb_iba