Rainbow Electronics MAX16066 - Manual (Page 13)

12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
MAX16065/MAX16066
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of the EN comparator output or the software enable bit.
If operating in latch-on fault mode, toggle EN or toggle
the Software Enable bit to clear the latch condition and
restart the device once the fault condition has been
removed.
To initiate secondary sequencing and monitoring set the
software enable r73h[1] bit to 1. Additionally, if GPIO_ is
configured as EN2 then both the software enable 2 bit and
EN2 must be high. To power-down and disable monitor-
ing, either drive EN2 low or set the Software Enable2 bit to
‘0.’ See Table 2 for the software enable bit configurations.
When a fault condition occurs during the power-up cycle,
the EN_OUT_ outputs are powered down immediately,
independent of the state of EN2. Drive EN2 low to begin
the secondary power-down sequence. When EN2 is driv- en high during the power-down sequence, the sequence
state machine continues the power-down sequence until
the secondary channels are powered off and then the
device immediately begins the power-up sequence.
Monitoring Inputs While Sequencing
An enabled MON_ input can be assigned to a slot
ranging from Slot 1 to Slot 12. EN_OUT_s are always
asserted at the beginning of a slot. The supply volt-
ages connected to the MON_ inputs must exceed the
undervoltage threshold before the programmed timeout
period expires otherwise a fault condition will occur. The
undervoltage threshold checking cannot be disabled
during power-up and power-down. See Tables 5 and
6 for the MON_ slot assignment bits. The programmed
Table 2. Software Enable Configurations
Table 3. Slot Delay Register
REGISTER
ADDRESS
FLASH
ADDRESS
BIT RANGE DESCRIPTION
73h 273h
[0] Software enable 1 (primary sequence)
[1] Software enable 2 (secondary sequence)
[2] 1 = Margin mode enabled
[3]
Early warning threshold select
0 = Early warning is undervoltage
1 = Early warning is overvoltage
[4]
Independent watchdog mode enable
1 = Watchdog timer is independent of sequencer
0 = Watchdog timer boots after sequence completes
REGISTER
ADDRESS
FLASH
ADDRESS
BIT RANGE DESCRIPTION
77h 277h
[3:0] Sequence Slot 0 Delay
[7:4] Sequence Slot 1 Delay
78h 278h
[3:0] Sequence Slot 2 Delay
[7:4] Sequence Slot 3 Delay
79h 279h
[3:0] Sequence Slot 4 Delay
[7:4] Sequence Slot 5 Delay
7Ah 27Ah
[3:0] Sequence Slot 6 Delay
[7:4] Sequence Slot 7 Delay
7Bh 27Bh
[3:0] Sequence Slot 8 Delay
[7:4] Sequence Slot 9 Delay
7Ch 27Ch
[3:0] Sequence Slot 10 Delay
[7:4] Sequence Slot 11 Delay
7Dh 27Dh
[3:0] Sequence Slot 12 Delay
[7:4] Grouped Sequence Split Location, Final Slot of Primary Sequence