2 register description, 1 adcsrb – adc control and status register b, Acsr – analog – Rainbow Electronics ATtiny43U User Manual

Page 113: Table

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113

8048B–AVR–03/09

15.2

Register Description

15.2.1

ADCSRB – ADC Control and Status Register B

• Bit 6 – ACME: Analog Comparator Multiplexer Enable

When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see

“Analog Comparator Multiplexed Input” on page 112

.

15.2.2

ACSR – Analog Comparator Control and Status Register

• Bit 7 – ACD: Analog Comparator Disable

When this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.

• Bit 6 – ACBG: Analog Comparator Bandgap Select

When this bit is set, a fixed bandgap reference voltage replaces the positive input to the Analog
Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog
Comparator.

• Bit 5 – ACO: Analog Comparator Output

The output of the Analog Comparator is synchronized and then directly connected to ACO. The
synchronization introduces a delay of 1 - 2 clock cycles.

Table 15-1.

Analog Comparator Multiplexed Input

ACME

ADEN

MUX2..0

Analog Comparator Negative Input

0

X

XXX

AIN1

1

1

XXX

AIN1

1

0

000

ADC0

1

0

001

ADC1

1

0

010

ADC2

1

0

011

ADC3

Bit

7

6

5

4

3

2

1

0

0x03 (0x23)

BS

ACME

ADLAR

ADTS2

ADTS1

ADTS0

ADCSRB

Read/Write

R

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Initial Value

0

0

0

0

0

0

0

0

Bit

7

6

5

4

3

2

1

0

0x08 (0x28)

ACD

ACBG

ACO

ACI

ACIE

ACIS1

ACIS0

ACSR

Read/Write

R/W

R/W

R/W

R/W

R/W

R

R/W

R/W

Initial Value

0

0

N/A

0

0

0

0

0

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