Interrupt response time, Atmega16(l) – Rainbow Electronics ATmega64L User Manual
Page 12

12
ATmega16(L)
2466B–09/01
Note that the status register is not automatically stored when entering an interrupt rou-
tine, nor restored when returning from an interrupt routine. This must be handled by
software.
When using the CLI instruction to disable interrupts, the interrupts will be immediately
disabled. No interrupt will be executed after the CLI instruction, even if it occurs simulta-
neously with the CLI instruction. The following example shows how this can be used to
avoid interrupts during the timed EEPROM write sequence..
When using the SEI instruction to enable interrupts, the instruction following SEI will be
executed before any pending interrupts, as shown in this example.
Interrupt Response Time
The interrupt execution response for all the enabled AVR interrupts is 4 clock cycles
minimum. After 4 clock cycles the program vector address for the actual interrupt han-
dling routine is executed. During this 4 clock cycle period, the Program Counter is
pushed onto the Stack. The vector is normally a jump to the interrupt routine, and this
jump takes 3 clock cycles. If an interrupt occurs during execution of a multi-cycle instruc-
tion, this instruction is completed before the interrupt is served. If an interrupt occurs
when the MCU is in sleep mode, the interrupt execution response time is increased by 4
clock cycles. This increase comes in addition to the start-up time from the selected
sleep mode.
A return from an interrupt handling routine takes 4 clock cycles. During these 4 clock
cycles, the Program Counter (2 bytes) is popped back from the Stack, the Stack Pointer
is incremented by 2, and the I-bit in SREG is set.
Assembly Code Example
in
r16, SREG
; store SREG value
cli
; disable interrupts during timed sequence
sbi
EECR, EEMWE
; start EEPROM write
sbi
EECR, EEWE
out
SREG, r16
; restore SREG value (I-bit)
C Code Example
char
cSREG;
cSREG = SREG;
/* store SREG value */
/* disable interrupts during timed sequence */
_CLI();
EECR |= (1<<EEMWE); /* start EEPROM write */
EECR |= (1<<EEWE);
SREG = cSREG; /* restore SREG value (I-bit) */
Assembly Code Example
sei
; set global interrupt enable
sleep
; enter sleep, waiting for interrupt
; note: will enter sleep before any pending
; interrupt(s)
C Code Example
_SEI(); /* set global interrupt enable */
_SLEEP(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */