Data sheet, High sensitivity cmos hall-effect latch ah921, Typical performance characteristics – Diodes AH921 User Manual
Page 10: Continued), Figure 13. b, Vs. v, Figure 14. b, Vs. t, Figure 15. v, Vs. i
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Data Sheet
HIGH SENSITIVITY CMOS HALL-EFFECT LATCH AH921
Jul. 2011 Rev. 1. 2 BCD Semiconductor Manufacturing Limited
10
Typical Performance Characteristics
(Continued)
Figure 13. B
OP
/B
RP
/B
HYS
vs. V
CC
Figure 14. B
OP
/B
RP
/B
HYS
vs. T
A
0
5
10
15
20
25
0
20
40
60
80
100
120
140
160
180
V
SAT
(m
V
)
I
OUT
(mA)
T
A
=25
o
C
V
CC
=12V
Figure 15. V
SAT
vs. I
OUT
Figure 16. V
SAT
vs. T
A
4
8
12
16
20
24
-20
-10
0
10
20
30
40
50
B
OP
/B
RP
/B
HY
S
(
G
aus
s)
V
CC
(V)
T
A
=25
o
C
B
OP
B
RP
B
HYS
-25
0
25
50
75
100
125
-20
-10
0
10
20
30
40
B
OP
/B
RP
/B
HY
S
(Gauss)
T
A
(
o
C)
V
CC
=12V
B
OP
B
RP
B
HYS
-25
0
25
50
75
100
125
100
120
140
160
180
200
220
240
V
SAT
(m
V)
T
A
(
o
C)
V
CC
=5V
V
CC
=12V
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