Data sheet, High sensitivity cmos hall-effect latch ah921, Test circuit and test conditions (continued) – Diodes AH921 User Manual

Page 9: Typical performance characteristics

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Data Sheet

HIGH SENSITIVITY CMOS HALL-EFFECT LATCH AH921

Jul. 2011 Rev. 1. 2 BCD Semiconductor Manufacturing Limited

9

Test Circuit and Test Conditions (Continued)





Figure 10. Test Condition of AH921 (Output Leakage Current)



Note 9: The device is put under the magnetic field: B<B

RP.





Typical Performance Characteristics




















Figure 11. I

CC

vs. V

CC

Figure 12. I

CC

vs. T

A


4

6

8

10

12

14

16

18

20

22

24

1.0

1.5

2.0

2.5

3.0

3.5

4.0

I

CC

(m

A

)

V

CC

(V)

T

A

=25

o

C

-25

0

25

50

75

100

125

1.5

2.0

2.5

3.0

3.5

4.0

I

CC

(m

A

)

T

A

(

o

C)

V

CC

=5V

V

CC

=12V

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