IEI Integration PCIE-Q350 v1.30 - Manual (Page 78)

PCIE-Q350 PICMG 1.3 CPU Card
Page 58
Figure 4-12: TPM Connector Location
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 LCLK 2 GND2
3 LFRAME# 4 KEY
5 LRESET# 6 +5V
7 LAD3 8 LAD2
9 +3V 10 LAD1
11 LAD0 12 GND3
13 SCL 14 SDA
15 SB3V 16 SERIRQ
17 GND1 18 GLKRUN#
19 LPCPD# 20 LDRQ#
Table 4-13: TPM Connector Pinouts
4.2.12 SDVO Control Connector
CN Label: SDVO1
CN Type: 3-pin header (1x3)
CN Location: See Figure 4-13
CN Pinouts: See Table 4-14
If an SDVO graphics card is installed on the PCIe x16 expansion slot on the backplane,
the 1x3 pin Serial Digital Video Output (SDVO) control connector must be connected to a
corresponding SDVO control connector on a compatible IEI backplane.