IEI Integration PCISA-PV-D4251_N4551_D5251 - Manual (Page 32)

PCISA-PV-D4251/N4551/D5251 CPU Card
Page 19
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 SPK_R 2 LINE1R
3 GND 4 GND
5 SPK_L 6 LINE1L
7 GND 8 GND
9 FMIC1R 10 FMIC1L
Table 3-5: Audio Connector Pinouts
3.2.3 Battery Connector
CN Label: BAT1
CN Type: 2-pin wafer (1x2)
CN Location: See Figure 3-4
CN Pinouts: See Table 3-6
This is connected to the system battery. The battery provides power to the system clock to
retain the time when power is turned off.
Figure 3-4: Battery Connector Location
Pin Description
1 Battery+ (+3V)
2 Ground
Table 3-6: Battery Connector Pinouts