IEI Integration PCISA-PV-D4251_N4551_D5251 - Manual (Page 34)

PCISA-PV-D4251/N4551/D5251 CPU Card
Page 21
16 N/C 41 HDD_RESET
17 N/C 42 IORDY
18 SA2 43 SDREQ
19 SA1 44 SDACK#
20 SA0 45 HDD_ACTIVE#
21 DATA 0 46 66DET
22 DATA 1 47 DATA 8
23 DATA 2 48 DATA 9
24 N/C 49 DATA 10
25 VCC-IN CHECK2 50 GROUND
Table 3-7: CF Card Socket Pinouts
3.2.5 Digital Input/Output Connector
CN Label: DIO1
CN Type: 10-pin header (2x5)
CN Location: See Figure 3-6
CN Pinouts: See Table 3-8
The DIO connector is managed through a Super I/O chip. The DIO connector pins are
user programmable. The digital IO port of PCISA-PV-D4251/N4551/D5251 is 5V CMOS
level.
Figure 3-6: DIO Connector Location