4 intel, Ich7-m low pin count (lpc) interface, 5 intel – IEI Integration NANO-9453 v1.10 User Manual

Page 42: Ich7-m pci interface, Table 2-4: supported hdd specifications

Advertising
background image

NANO-9453 EPIC Motherboard

Page 22

DMA/UDMA Max Transfer

100MB/s 66MB/s 33MB/s

Controller Interface

5V 5V 5V

Table 2-4: Supported HDD Specifications

2.6.4 Intel

®

ICH7-M Low Pin Count (LPC) Interface

The ICH7-M LPC interface complies with the LPC 1.1 specifications. The LPC bus from

the ICH6 is connected to the following components:

BIOS chipset

Super I/O chipset

2.6.5 Intel

®

ICH7-M PCI Interface

The PCI interface on the ICH7-M is compliant with the PCI Revision 2.3 implementation.

Some of the features of the PCI interface are listed below.

PCI Revision 2.3 compliant

33MHz

5V tolerant PCI signals (except PME#)

Integrated PCI arbiter supports up to seven PCI bus masters

The PCI bus on the ICH7-M Southbridge is directly connected to the PC/104-Plus

connector.

Advertising