IEI Integration WAFER-945GSE2 v2.00 - Manual (Page 38)

WAFER-945GSE2 3.5" Motherboard
Page 23
Pin Description Pin Description
16 A4 41 RESET#
17 A3 42 WAIT#
18 A2 43 INPACK#
19 A1 44 REG#
20 A0 45 BVD2
21 D0 46 BVD1
22 D1 47 D8
23 D2 48 D9
24 IOCS16# 49 D10
25 CD2# 50 GND2
Table 3-8: CF Card Socket Pinouts
3.2.7 Digital Input/Output (DIO) Connector
CN Label: DIO1
CN Type: 10-pin header
CN Location: See Figure 3-9
CN Pinouts: See Table 3-9
The digital input/output connector is managed through a Super I/O chip. The DIO
connector pins are user programmable.
Figure 3-9: Digital I/O Connector Location