ARM VERSION 1.2 - Manual (Page 203)

Thumb Instruction Reference
ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All rights reserved. 5-9
5.1.3 LDR and STR, pc or sp relative
Load Register and Store Register. Address in memory specified as an immediate offset
from a value in the pc or the sp.
Note
There is no pc-relative STR instruction.
Syntax
LDR Rd, [pc, #immed_8x4]
LDR Rd, label
LDR Rd, [sp, #immed_8x4]
STR Rd, [sp, #immed_8x4]
where:
Rd is the register to be loaded or stored. Rd must be in the range r0 to r7.
immed_8x4 is the offset. It is an expression evaluating (at assembly time) to a multiple
of 4 in the range 0 to 1020.
label is a program-relative expression. See Register-relative and
program-relative expressions on page 3-23 for more information.
label must be after the current instruction, and within 1KB of it.
Usage
STR instructions store a word to memory.
LDR instructions load a word from memory.
The address is found by adding the offset to the base address from pc or sp. Bit[1] of the
pc is ignored. This ensures that the address is word-aligned.
Address alignment for word and halfword transfers
The address must be a multiple of 4.
If your system has a system coprocessor (cp15), you can enable alignment checking.
Non-aligned transfers cause an alignment exception if alignment checking is enabled.