ARM VERSION 1.2 User Manual
Page 211
Thumb Instruction Reference
ARM DUI 0068B
Copyright © 2000, 2001 ARM Limited. All rights reserved.
5-17
Note
An
ADD
instruction with a negative value for
expr3
or
expr8
assembles to the
corresponding
SUB
instruction with a positive constant. A
SUB
instruction with a negative
value for
expr3
or
expr8
assembles to the corresponding
ADD
instruction with a positive
constant.
Be aware of this when looking at disassembly listings.
Restrictions
Rd
,
Rn
, and
Rm
must all be low registers (that is, in the range r0 to r7).
Condition flags
These instructions update the N, Z, C, and V flags.
Architectures
These instructions are available in all T variants of the ARM architecture.
Examples
ADD r3,r1,r5
SUB r0,r4,#5
ADD r7,#201
ADD r1,vc+4 ; vc + 4 must evaluate at assembly time to
; an integer in the range -255 to +255
Incorrect examples
ADD r9,r2,r6 ; high registers not allowed
SUB r4,r5,#201 ; immediate value out of range
SUB r3,#-99 ; negative immediate values not allowed