Figure 8. low bandwidth and new clock domain, Figure 9. high bandwidth with clk_in domain re-use, Cs2300-otp – Cirrus Logic CS2300-OTP User Manual

Page 12: Pll bw = 1 hz, Pll bw = 128 hz

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Figure 8. low bandwidth and new clock domain, Figure 9. high bandwidth with clk_in domain re-use, Cs2300-otp | Pll bw = 1 hz, Pll bw = 128 hz | Cirrus Logic CS2300-OTP User Manual | Page 12 / 26 Figure 8. low bandwidth and new clock domain, Figure 9. high bandwidth with clk_in domain re-use, Cs2300-otp | Pll bw = 1 hz, Pll bw = 128 hz | Cirrus Logic CS2300-OTP User Manual | Page 12 / 26
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