Pin descriptions, Pin name # pin description – Cirrus Logic CS42418 User Manual

Page 16

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16

DS603F2

CS42418

2. PIN DESCRIPTIONS

Pin Name

#

Pin Description

DAC_SDIN1
DAC_SDIN2
DAC_SDIN3-
DAC_SDIN4

1

64
63
62

DAC Serial Audio Data Input (Input) - Input for two’s complement serial audio data.

DAC_SCLK

2

DAC Serial Clock (Input/Output) - Serial clock for the DAC serial audio interface.

DAC_LRCK

3

DAC Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on
the DAC serial audio data line.

VD

4

51

Digital Power (Input) - Positive power supply for the digital section.

DGND

5

52

Digital Ground (Input) - Ground reference. Should be connected to digital ground.

VLC

6

Control Port Power (Input) - Determines the required signal level for the control port.

SCL/CCLK

7

Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external pull-up
resistor to the logic interface voltage in I²C mode as shown in the Typical Connection Diagram.

SDA/CDOUT

8

Serial Control Data (Input/Output) - SDA is a data I/O line in I²C mode and requires an external pull-up
resistor to the logic interface voltage, as shown in the Typical Connection Diagram. CDOUT is the output
data line for the control port interface in SPI mode.

AD1/CDIN

9

Address Bit 1 (I²C)/Serial Control Data (SPI) (Input) - AD1 is a chip address pin in I²C mode; CDIN is
the input data line for the control port interface in SPI mode.

AD0/CS

10

Address Bit 0 (I²C)/Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C mode; CS
is the chip select signal in SPI mode.

INT

11

Interrupt (Output) - The CS42418 will generate an interrupt condition as per the Interrupt Mask register.
See

“Interrupts” on page 37

for more details.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

DAC_SDIN1

A

DC_

S

C

L

K

AD

C_L

R

C

K

VD

DGND

VLC

SCL/CCLK

SDA/CDOUT

AD1/CDIN

AD0/CS

INT

RST

AINR-

AINR+

AINL+

AINL-

VQ

FI

L

T

+

RE

F

G

N

D

AO

U

T

B4-

AO

U

T

B4+

AO

U

T

A4+

AO

U

T

A4-

VA

AG

ND

AO

U

T

B3

-

AO

U

T

B3

+

AO

U

T

A3

+

AO

U

T

A3

-

AO

U

T

B2-

AO

U

T

B2

+

AO

U

T

A2

+

AOUTA2-

AOUTB1-

AOUTB1+

AOUTA1+

AOUTA1-

MUTEC

AGND

VA

GPO7

GPO6

GPO5

GPO4

GPO3

GPO2

GPO1

LPFLT

NC

NC

VD

DG

N

D

VL

S

NC

RMCK

ADC

_

SD

O

U

T

AD

CI

N

2

AD

CI

N

1

OMCK

DAC_LRCK

DAC_SCLK

DAC

_

SD

IN

4

DAC

_

SD

IN

3

DAC

_

S

D

IN

2

CS42418

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