Cirrus Logic CS4245 - Manual (Page 36)

36 DS656F3
CS4245
De-emphasis is only available in Single-Speed Mode.
4.10 Internal Digital Loopback
The CS4245 supports an internal digital loopback mode in which the output of the ADC is routed to the input
of the DAC. This mode may be activated by setting the LOOP bit in the Signal Selection register (See Sec-
tion 6.6 “Signal Selection - Address 06h” on page 46 ). To use this mode, the ADC and DAC must be oper-
ating at the same synchronous sample rate.
When this bit is set, the status of the DAC_DIF[1:0] bits in register 03h will be disregarded by the CS4245.
Any changes made to the DAC_DIF[1:0] bits while the LOOP bit is set will have no impact on operation until
the LOOP bit is cleared, at which time the Digital Interface Format of the DAC will operate according to the
format selected by the DAC_DIF[1:0] bits. While the LOOP bit is set, data will be present on the SDOUT pin
in the format selected by the ADC_DIF bit in register 04h.
4.11 Mute Control
The MUTEC pin becomes active during power-up initialization, reset, and muting if the MCLK2 to LRCK2
ratio is incorrect in Asynchronous Mode or the MCLK1 to LRCK2 ratio is incorrect in Synchronous Mode,
and during power-down. The MUTEC pin is intended to be used as control for an external mute circuit in
order to add off-chip mute capability.
Use of the Mute Control function is not mandatory, but recommended, for designs requiring the absolute
minimum in extraneous clicks and pops. Also, use of the Mute Control function can enable the system de-
Gain
dB
-10dB
0dB
Frequency
T2 = 15 µs
T1=50 µs
F1 F2
3.183 kHz 10.61 kHz
Figure 15. De-Emphasis Curve