Table 2. line in to s/pdif out performance plots, 3 s/pdif in to speaker out, 4 analog in to analog out - digital loopback – Cirrus Logic CRD42L52 User Manual

Page 8: Crd42l52

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8

DS680RD1

CRD42L52

Table 2

shows expected performance characteristics when the boards are configured to make analog input

to digital output measurements.

3.3

S/PDIF In to Speaker Out

Stereo differential speaker outputs from the CS42L52 can be monitored on screw terminals J3 and J4. The
CS42L52 can be set up to provide data to the PWM modulator for producing speaker outputs from either
the serial port PCM input or the ADC output using the FlexGUI software. For a description of the Cirrus
FlexGUI software controls, refer to

Section 4 on page 9

.

Table 3

shows expected performance characteris-

tics when the boards are configured to make speaker output measurements.

Figure 3. CRD42L52 and CDB42LDB1 Block Diagram for Digital Loopback Testing

3.4

Analog In to Analog Out - Digital Loopback

In order to use the CS42L52 in digital loopback mode, one can configure the CS42L52 to operate in master
or slave mode.

Figure 3

shows the board configuration when the CODEC is set up to operate in master

mode. In this mode, the CS42L52 receives an MCLK from the driver board from the CS8416 S/PDIF reciev-
er. As described in

Section 1.3 on page 4

and shown in

Figure 3

, the S/PDIF receiver uses the on-board

12.288 MHz clock as an MCLK when it is not receiving a S/PDIF input stream.

Table 3

shows expected per-

formance characteristics when the boards are configured to make speaker output measurements.

Plot

Location

Dynamic Range - Line In to S/PDIF Out

Figure 9 on page 15

Frequency Response - Line In to S/PDIF Out

Figure 10 on page 15

THD + N - Line In to S/PDIF Out

Figure 11 on page 15

Table 2. Line In to S/PDIF Out Performance Plots

Plot

Location

Frequency Response - S/PDIF In to Speaker Out

Figure 17 on page 16

Table 3. S/PDIF In to Speaker Out Performance Plots

Plot

Location

Dynamic Range - Line In to HP Out (Digital Loopback)

Figure 18 on page 16

THD + N - Line In to HP Out (Digital Loopback)

Figure 19 on page 17

CS42L52

CS8416

S/PDIF Rx

MCLK

LRCLK
SCLK

SDOUT

AIN1A

AIN1B

R

T

Line

Input

(MASTER)

(MASTER)

12.288 MHz

Oscillator

T

R

Headphone

Output

HP/ LINE_OUTA

HP/ LINE_OUTB

CRD42L52

RMCK

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