Cirrus Logic CS4384 - Manual (Page 15)

DS620F1 15
CS4384
SWITCHING CHARACTERISTICS - DSD
(Logic 0 = AGND = DGND; Logic 1 = VLS; C
L
= 30 pF)
Parameter Symbol Min Typ Max Unit
MCLK Duty Cycle 40 - 60 %
DSD_SCLK Pulse Width Low t
sclkl
160 - - ns
DSD_SCLK Pulse Width High t
sclkh
160 - - ns
DSD_SCLK Frequency (64x Oversampled)
(128x Oversampled)
1.024
2.048 -
- 3.2
6.4 MHz
MHz
DSD_A / _B valid to DSD_SCLK rising setup time t
sdlrs
20 - - ns
DSD_SCLK rising to DSD_A or DSD_B hold time t
sdh
20 - - ns
DSD clock to data transition (Phase Modulation Mode) t
dpm
-20 - 20 ns
sclkh
t
sclkl
t
DSDxx
DSD_SCLK
sdlrs
t
sdh
t
Figure 3. Direct Stream Digital - Serial Audio Input Timing
dpm
t
DSDxx
DSD_SCLK
(64Fs)
DSD_SCLK
(128Fs)
dpm
t
Figure 4. Direct Stream Digital - Serial Audio Input Timing for Phase Modulation Mode