Cirrus Logic CS4384 - Manual (Page 2)

2 DS620F1
CS4384
TABLE OF CONTENTS
1. PIN DESCRIPTION................................................................................................................................. 6
2. CHARACTERISTICS AND SPECIFICATIONS...................................................................................... 8
RECOMMENDED OPERATING CONDITIONS .......................................................................................... 8
ABSOLUTE MAXIMUM RATINGS............................................................................................................... 8
DAC ANALOG CHARACTERISTICS........................................................................................................... 9
POWER AND THERMAL CHARACTERISTICS........................................................................................ 10
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE............................................ 11
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE............................................ 12
DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSE .................................................. 12
DIGITAL CHARACTERISTICS .................................................................................................................. 13
SWITCHING CHARACTERISTICS - PCM ................................................................................................ 14
SWITCHING CHARACTERISTICS - DSD................................................................................................. 15
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT.................................................... 16
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT................................................... 17
3. TYPICAL CONNECTION DIAGRAM ................................................................................................ 18
4. APPLICATIONS ................................................................................................................................... 20
4.1 Master Clock.................................................................................................................................. 20
4.2 Mode Select.................................................................................................................................. 21
4.3 Digital Interface Formats ............................................................................................................... 22
4.3.1 OLM #1 ................................................................................................................................ 23
4.3.2 OLM #2 ................................................................................................................................ 23
4.3.3 OLM #3 ................................................................................................................................ 24
4.3.4 OLM #4 ................................................................................................................................ 24
4.3.5 TDM ..................................................................................................................................... 24
4.4 Oversampling Modes..................................................................................................................... 25
4.5 Interpolation Filter .......................................................................................................................... 25
4.6 De-Emphasis ................................................................................................................................. 25
4.7 ATAPI Specification ....................................................................................................................... 26
4.8 Direct Stream Digital (DSD) Mode................................................................................................. 26
4.9 Grounding and Power Supply Arrangements ................................................................................ 27
4.9.1 Capacitor Placement............................................................................................................ 27
4.10 Analog Output and Filtering ......................................................................................................... 27
4.11 The MUTEC Outputs ................................................................................................................... 28
4.12 Recommended Power-Up Sequence .......................................................................................... 29
4.12.1 Hardware Mode.................................................................................................................. 29
4.12.2 Software Mode ................................................................................................................... 29
4.13 Recommended Procedure for Switching Operational Modes...................................................... 30
4.14 Control Port Interface .................................................................................................................. 30
4.14.1 MAP Auto Increment .......................................................................................................... 30
4.14.2 I²C Mode ............................................................................................................................ 30
4.14.3 SPI Mode ........................................................................................................................... 31
4.15 Memory Address Pointer (MAP) ................................................................................................. 32
4.15.1 INCR (Auto Map Increment Enable) .................................................................................. 32
4.15.2 MAP4-0 (Memory Address Pointer) ................................................................................... 32
5. REGISTER QUICK REFERENCE ....................................................................................................... 33
6. REGISTER DESCRIPTION .................................................................................................................. 35
6.1 Chip Revision (Address 01h) ......................................................................................................... 35
6.1.1 Part Number ID (PART) [Read Only] ................................................................................... 35
6.1.2 Revision ID (REV) [Read Only] ............................................................................................ 35
6.2 Mode Control 1 (Address 02h) ...................................................................................................... 35
6.2.1 Control Port Enable (CPEN) ................................................................................................ 35
6.2.2 Freeze Controls (FREEZE) .................................................................................................. 35