Cirrus Logic CS43L22 - Manual (Page 26)

26 DS792F2
CS43L22
Confidential Draft
3/4/10
4.5 PWM Outputs
Note: The PWM speaker amplifiers should not be used in the 384x MCLK modes (18.4320 and
16.9344 MHz).
Referenced Control Register Location
PWM Control
SPKxMUTE .........................
MUTE50/50 .........................
SPKMONO ..........................
SPKxVOL[7:0] .....................
SPKSWAP...........................
SPKB=A ..............................
BATTCMP ...........................
VPREF[3:0] .........................
VPLVL[7:0] ..........................
PDN_SPKx[1:0]...................
SPKxSHRT..........................
“Speaker Mute” on page 45
“Speaker Mute 50/50 Control” on page 46
“Speaker MONO Control” on page 46
“Speaker Volume Control” on page 52
“Speaker Channel Swap” on page 45
“Speaker Volume Setting B=A” on page 45
“Battery Compensation” on page 56
“VP Reference” on page 57
“VP Voltage Level (Read Only)” on page 57
“Speaker Power Control” on page 38
“Speaker Current Load Status (Read Only)” on page 57
VOL
PWM
Modulator
A
SPKAMUTE
SPKBMUTE
MUTE50/50
SPKMONO
SPKSWAP
SPKB=A
SPKAVOL[7:0]
SPKBVOL[7:0]
+0dB/-102dB
0.5dB steps
PDN_SPKA[1:0]
PDN_SPKB[1:0]
Short
Circuit
SPKASHRT
Battery
Compensation
BATTCMP
VPREF[3:0]
VPLVL[7:0]
SPKBSHRT
+
-
+
-
Gate
Drive
from DSP
Engine
Speaker
Outputs
B
Figure 10. PWM Output Stage