Cirrus Logic CDB48500-USB - Manual (Page 5)

CDB48500 USB Evaluation Kit Guide v
CDB48500
Figures
Figure 1-1. CDB48500-USB System Block Diagram ......................................................................................... 1-2
Figure 1-2. CDB48500-USB Top View ............................................................................................................... 1-3
Figure 2-1. CDB USB MASTER Driver Setup .................................................................................................... 2-2
Figure 2-2. Board Setup Diagram ...................................................................................................................... 2-3
Figure 2-3. Found New Hardware Service Window ........................................................................................... 2-4
Figure 2-4. Found New Hardware Wizard Welcome Window ............................................................................ 2-4
Figure 2-5. Found New Hardware Wizard Finish Window ................................................................................. 2-5
Figure 2-6. Microsoft Windows XP

Windows ................................................................................................... 2-5
Figure 3-1. CDB48500 Block Diagram ............................................................................................................... 3-1
Figure 3-2. Simplified Clock and Data Flow for up to 8 Channel ADC Inputs .................................................... 3-6
Figure 3-3. Simplified Clock and Data Flow for S/PDIF Input ............................................................................ 3-7
Figure 3-4. CDB USB Master Card Clocking and Data Flow ............................................................................. 3-8
Figure 4-1. PCM Pass-through Example Application ......................................................................................... 4-2
Figure 4-2. System Configuration ...................................................................................................................... 4-2
Figure 4-3. Audio In via S/PDIF In ..................................................................................................................... 4-3
Figure 4-4. Audio In via 8 Channel ADC ............................................................................................................ 4-4
Figure 4-5. DAI Device Properties ..................................................................................................................... 4-5
Figure 4-6. CDB48500 Digital Audio Output Properties ..................................................................................... 4-6
Figure 4-7. Codec DAC Properties .................................................................................................................... 4-7
Figure 4-8. CDB48500 Comm Mode .................................................................................................................. 4-8
Figure 4-9. Remap Tab ...................................................................................................................................... 4-8
Figure A-1. CS48500 System Block Diagram .................................................................................................... A-6
Figure A-2. DSP Input Data Multiplexing Schematic........................................................................................... A-7
Figure A-3. DSP Schematic ................................................................................................................................ A-8
Figure A-4. Serial Flash Memory Schematic....................................................................................................... A-9
Figure A-5. SPDIF Receiver Schematic............................................................................................................ A-10
Figure A-6. Codec #1(CS42448) Schematic..................................................................................................... A-11
Figure A-7. Codec #2 (CS42448) Schematic.................................................................................................... A-12
Figure A-8. Codec 1 and Codec 2 Input Filters Schematic ............................................................................... A-13
Figure A-9. Output Filters & Headphone Output .............................................................................................. A-14
Figure A-10. Mic Preamp Schematic ................................................................................................................ A-15
Figure A-11. Control Connector and Power Schematic .................................................................................... A-16