Cirrus Logic CS4955 - Manual (Page 37)

CS4954 CS4955
DS278F6 37
0 × 09 gpio_ctrl_reg r/w 00h
0 × 0A gpio_data_reg r/w 00h
0 × 0B RESERVED
0 × 0C RESERVED
0 × 0D SYNC_0 r/w 90h
0 × 0E SYNC_1 r/w F4h
0 × 0F I²C_ADR r/w 00h
0 × 10 SC_AMP r/w 1Ch
0 × 11 SC_SYNTH0 r/w 3Eh
0 × 12 SC_SYNTH1 r/w F8h
0 × 13 SC_SYNTH2 r/w E0h
0 × 14 SC_SYNTH3 r/w 43h
0 × 15 HUE_LSB r/w 00h
0 × 16 HUE_MSB r/w 00h
0 × 17 SCH PHASE ADJUST r/w 00h
0 × 18 CC_EN r/w 00h
0 × 19 CC_21_1 r/w 00h
0 × 1A CC_21_2 r/w 00h
0 × 1B CC_284_1 r/w 00h
0 × 1C CC_284_2 r/w 00h
0 × 1D RESERVED
0 × 1E WSS_REG_0 r/w 00h
0 × 1F WSS_REG_1 r/w 00h
0 × 20 WSS_REG_2 r/w 00h
0 × 21 RESERVED
0 × 22 CB_AMP r/w 80h
0 × 23 CR_AMP r/w 80h
0 × 24 Y_AMP r/w 80h
0 × 25 R_AMP r/w 80h
0 × 26 G_AMP r/w 80h
0 × 27 B_AMP r/w 80h
0 × 28 BRIGHT_OFFSET r/w 00h
0 × 29 TTXHS r/w A1h
0 × 2A TTXHD r/w 02h
0 × 2B TTXOVS r/w 00h
0 × 2C TTXOVE r/w 00h
0 × 2D TTXEVS r/w 00h
0 × 2E TTXEVE r/w 00h
0 × 2F TTX_DIS1 r/w 00h
0 × 30 TTX_DIS2 r/w 00h
0 × 31 TTX_DIS_3 r/w 00h
0 × 32 INT_EN r/w 00h
0 × 33 INT_CLR r/w 00h
Address Register Name Type Default value
Table 9. Control Registers (Continued)