Timing characteristics, Figure 2. i²c host port timing – Cirrus Logic CS4955 User Manual

Page 9

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CS4954 CS4955

DS278F6

9

TIMING CHARACTERISTICS

Parameter

Symbol

Min

Typ

Max

Units

I²C Host Port Timing (Figure

2

)

SCL Frequency

Fclk

1000

kHz

Clock Pulse High Time

Tsph

0.1

μs

Clock Pulse Low Time

Tspl

0.7

μs

Hold Time (Start Cond.)

Tsh

100

ns

Setup Time (Start Cond.)

Tssu

100

ns

Data Setup Time

Tsds

50

ns

Rise Time

Tsr

1

μs

Fall Time

Tsf

0.3

μs

Setup Time (Stop Cond.)

Tss

100

ns

Bus Free Time

Tbuf

100

ns

Data Hold Time

Tdh

0

ns

SCL Low to Data Out Valid

Tvdo

600

ns

Figure 2. I²C Host Port Timing

SDA

SCL

T

bu

T

sh

T

dh

T

ds

T

sh

T

ss

T

ssu

T

si

T

spi

T

sr

T

sph

T

vdo

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