Cirrus Logic CRD48L10 - Manual (Page 21)

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3.2 MCU UI Controlled
3.1.6 S/PDIF
Figure 3-13. Data Path for S/PDIF Audio
Figure 3-14. Clocking for S/PDIF Audio–DSP MCLK Slave
Both the Mini-Optical and 1/8” Coax inputs are connected to the S/PDIF Receiver, but only one can be active at any time
(there is only one physical plug). If both the optical and coax were active, the S/PDIF Receiver would be unable to recover
clock or data.
3.2 MCU UI Controlled
3.2.1 Powering Up the Board
When powering on the CRD48L10 board, the power LEDs D5-D9 should illuminate indicating that all power rails are good
and the output connector LEDs D4, D8, D10, D11, and D20 should illuminate to show that the MCU has configured the
codec to drive audio out of the board. No input mode LEDs are illuminated since default input mode is from on-board
FLASH. Power up state of the CRD48L10 is shown in
Fig. 3-15 .
Digital MIC
MIC1
MIC2
Line In (L)
Line In (R)
ASP OUT
XSP OUT
DAI1
DAI2
SPDIF RX
(CS8416)
Level
Translation
DAO 1
DAO2
Level
Translation
SPDIF TX
(CS8406 )
ASP IN
XSP IN
Speakerphone (L)
Speakerphone (R)
AMP
(CS3501 )
EAR
Headphone Outputs (L&R)
Line Outputs (L&R)
(CS42L73)
Mini Optical RX
Or
1/8" Coax
Mini Optical TX
VSP OUT VSP IN
SCP
(CS48L10)
ADC
DAC
DAC
Level
Translation
(CS48L10)
(CS42L73)
SPDIF RX
(CS8416 )
CLOCK MCLK1
MC
L
K
SCLK LRCLK
SCLK (ASP/XSP)
LRCLK (ASP/XSP)
SCLK
LRCLK
OSCILLATOR
12.288 MHz
Mini Optical RX
Or
1/8" Coax