Cirrus Logic CS8952 - Manual (Page 12)

CS8952
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 12
DS206F1
10BASE-T MII RECEIVE TIMING
Parameter Symbol Min Typ Max Unit
RX_CLK Period t
P
- 400 - ns
RX_CLK Pulse Width t
WL,
t
WH
- 200 - ns
RXD[3:0], RX_ER, RX_DV setup to rising edge of
RX_CLK t
SU
30 - - ns
RXD[3:0], RX_ER, RX_DV hold from rising edge
of RX_CLK t
HD
30 - - ns
RX data valid from CRS t
RLAT
- 8 10 BT
RX+/- preamble to CRS asserted t
CRS1
- 5 7 BT
RX+/- end of packet to CRS de-asserted t
CRS2
2.5 3 BT
RX+/- preamble to COL asserted t
COL1
0 - 7 BT
RX+/- end of packet to COL de-asserted t
COL2
- - 3 BT
RX_EN asserted to RX_DV, RXD[3:0], RX_ER
valid t
EN
- - 60 ns
RX_EN de-asserted to RX_DV, RXD[3:0]. RX_ER
in high impedance state t
DIS
- - 60 ns
RX_CLK
RXD[3:0],
CRS
t
CRS1
t
COL2
t
RLAT
RX_EN
RX+/-
RX_DV
IN
OUT
IN
OUT
OUT
OUT COL
t
COL1
t
CRS2
t
HD
t
EN
t
DIS
RX_ER
t
WL
t
WH
t
P
t
SU
OUT