3 internal voltage reference, 4 clocking schemes, 3 internal voltage reference 7.4 clocking schemes – Cirrus Logic CS8952 User Manual

Page 63: Cs8952

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CS8952

CrystalLAN™ 100BASE-X and 10BASE-T Transceiver

63

DS206F1

TX_NRZ+/- termination components should be
placed as close to the fiber transceiver as possible,
while RX_NRZ+/- and SIGNAL+/- termination
components should be placed close to the CS8952.

The CS8952 100BASE-FX interface IO pins
(TX_NRZ+, TX_NRZ-, RX_NRZ+, RX_NRZ-,
SIGNAL+, and SIGNAL-) may be left unconnect-
ed if a fiber interface is not used.

7.3

Internal Voltage Reference

A 4.99 k

Ω biasing resistor must be connected be-

tween the CS8952 RES pin and ground. This resis-

tor biases the internal analog circuits of the CS8952
and should be placed as close as possible to RES
pin. Connect the other end of this resistor directly
to the ground plane. Connect the adjacent CS8952
ground pins (pins 85 and 87) to the grounded end of
the resistor forming a “shield” around the RES con-
nection.

7.4

Clocking Schemes

The CS8952 may be clocked using one of three
possible schemes: using a 25 MHz crystal and the
internal oscillator, using an external oscillator sup-

+5

1 µH

Ferrite Bead

0.1 µF

0.1 µF

1 µH

Ferrite Bead

0.1 µF

0.1 µF

+5

68

82

191

130

SIGNAL-

SIGNAL+

TX_NRZ-

TX_NRZ+

RX_NRZ-

RX_NRZ+

CS8952

+5

49.9

49.9

63.4

0.1 µF

+5

82

82

130

130

SD

TD-

TD+

RD-

RD+

RxV

TxV

RxV

TxV

CC

EE

CC

EE

8

9

4

5

6

7

4

5

6

7

8

3

2

1

9

HFBR-5103

FIBER TRANS.

Figure 7. Recommended Connection of Fiber Port

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