Cirrus Logic CS8952 - Manual (Page 20)

CS8952
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 20
DS206F1
rupt signal to the controller when a change of state
has occurred in the CS8952, eliminating the need
for the system to poll the CS8952 for state changes.
The RX_EN signal allows the receiver outputs to
be electrically isolated. The ISODEF pin controls
the value of register bit ISOLATE in the Basic
Mode Control Register (address 00h) which in turn
electrically isolates the CS8952's MII data path.
3.1 Major Operating Modes
The following sections describe the four major op-
erating modes of the CS8952:
- 100BASE-X MII Modes (TX and FX)
- 100BASE-X Repeater Modes
- 10BASE-T MII Mode
- 10BASE-T Serial Mode
The choice of operating speed (10 Mb/s versus
100 Mb/s) is made using the auto-negotiation input
pins (AN0, AN1) and/or the auto-negotiation MII
registers. The auto-negotiation capability also is
used to select a duplex mode (full or half duplex).
Both speed and duplex modes can either be forced
or negotiated with the far-end link partner.
The digital interface mode (MII, repeater, or
10BASE-T serial) is selected by input pins
BPALIGN, BP4B5B and 10BT_SER as shown in
Table 1. Speed and duplex selection are made
through the AN[1:0] pins as shown in Table 5.
3.1.1 100BASE-X MII Application (TX
and FX)
The CS8952 provides an IEEE 802.3-compliant
MII interface. Data is transferred across the MII in
four-bit parallel (nibble) mode. TX_CLK and
RX_CLK are nominally 25 MHz for 100BASE-X.
The 100BASE-X mode includes both the TX and
FX modes, as determined by pin BPSCR (bypass
scrambler), or the BPSCR bit (bit 13) in the Loop-
back, Bypass, and Receiver Error Mask Register
(address 18h). In FX mode, an external optical
module is connected to the CS8952 via pins
TX_NRZ+, TX_NRZ-, RX_NRZ+, RX_NRZ-,
SIGNAL+, and SIGNAL-. In FX mode, the MLT-
3/NRZI conversion blocks and the scrambler/de-
scrambler are bypassed.
3.1.1.1 Symbol Encoding and Decoding
In 100BASE-X modes, 4-bit nibble transmit data is
encoded into 5-bit symbols for transmission onto
the media as shown in Tables 2 and 3. The encod-
ing is necessary to allow data and control symbols
to be sent consecutively along the same media
transparent to the MAC layer. This encoding caus-
es the symbol rate transmitted across the wire (125
symbols/second) to be greater than the actual data
rate of the system (100 symbols/second).
Operating Mode BPALIGN BP4B5B 10BT_SER
100BASE-X MII 0 0 0
10BASE-T MII 0 0 0
Table 1.
100BASE-X
Repeater 1 Don’t
Care
0
0 1 0
10BASE-T Serial Don’t
Care
Don’t
Care
1
Operating Mode BPALIGN BP4B5B 10BT_SER
Table 1.
DATA and CONTROL Codes (RX_ER = 0 or TX_ER = 0)
Name 5-bit Symbol 4-bit Nibble Comments
DATA (Note 1)
0 11110 0000
1 01001 0001