Rockwell Automation 61C542 Voltage Input module User Manual

Page 24

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4Ć6

4.1.5

Low Low Alarm Status Register (Register 19)

Register 19 indicates the current status of each configured channel's

Low Low alarm. See figure 4.5. A bit is set in this register whenever a

channel's input value is less than the configured Low Low alarm limit.

The bit is reset when the input value returns to a level above the

configured limit.
When two channels are configured as a differential pair, only the bit

representing the first channel (evenĆnumber) will be updated. The

second channel's status bit will remain at zero.

Register 19

Bits 0Ć15

15 14 13 12 11 10 9

8

7

6

5

4

3

2 1

0

Bit 5 = Channel 5

Bit 6 = Channel 6

Bit 7 = Channel 7

Bit 8 = Channel 8

Bit 9 = Channel 9

Bit 10 = Channel 10

Bit 11 = Channel 11

Bit 12 = Channel 12

Bit 13 = Channel 13

Bit 14 = Channel 14

Bit 15 = Channel 15

Bit 0 = Channel 0

Bit 1 = Channel 1

Bit 2 = Channel 2

Bit 3 = Channel 3

Bit 4 = Channel 4

R

R

R R R R

R R

R

R

R

R

R

R R R

Figure 4.5 Ć Low Low Alarm Status Register

4.1.6

Out of Range Status Register (Register 20)

Register 20 indicates the current status of each configured channel's

Out of Range alarm. See figure 4.6. A bit is set in this register

whenever a channel's A/D input value is outside of the range of

-10.5 volts to 10.5 volts (bipolar inputs) or -0.5 volts to 10.5 volts

(unipolar inputs).
The bits in this register are not latched automatically. If you want a bit

to be latched the first time a value goes out of range, you must latch

it through the application program.
When two channels are configured as a differential pair, only the bit

representing the first channel (evenĆnumber) will be updated. The

second channel's status bit will remain at zero.
If an input is identified as being out of range, the most probable

cause is that a wire between the transmitter and the module has

either not been properly connected or has been broken.

Bits 0Ć15

Register 20

15 14 13 12 11 10 9

8

7

6

5

4

3

2 1

0

Bit 5 = Channel 5

Bit 6 = Channel 6

Bit 7 = Channel 7

Bit 8 = Channel 8

Bit 9 = Channel 9

Bit 10 = Channel 10

Bit 11 = Channel 11

Bit 12 = Channel 12

Bit 13 = Channel 13

Bit 14 = Channel 14

Bit 15 = Channel 15

Bit 0 = Channel 0

Bit 1 = Channel 1

Bit 2 = Channel 2

Bit 3 = Channel 3

Bit 4 = Channel 4

R

R

R R R R

R R

R

R

R

R

R

R R R

Figure 4.6 Ć Out of Range Status Register

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