Rockwell Automation 61C542 Voltage Input module - Manual (Page 29)

4Ć11
Bits 1 and 0 = When An Input Value Is Out Of Range, The Voltage Input Module
Will:
0ă0ă=ăRetain Old Input Value
0ă1ă=ăForce Input Value to Low Low Alarm Value
1ă0ă=ăForce Input Value to High High Alarm Value
1ă1ă=ăRetain Old Input Value
Bits 5 to 2 = Reserved
Bit 6=ĂCycle Frequency Averaging
ąă 0=ĂEnable
ąă 1=ĂDisable
Bit 7=ĂSquare Root Extraction
ą 0=ĂDisable
ąă 1=ĂEnable
Bit 8 = Differential Input Mode
0 = Disabled (singleĆended operation)
1 = Enabled
Bit 9 = Unipolar Inputs
0 = Disabled (Bipolar -10V to 10V inputs)
1 = Enabled (Unipolar 0 to 10V inputs)
Bits 11 to 10 = Reserved
Bits 15 to 12 = Configuration Command Code
0ă0ă0ă0ă=READY State
0ă0ă0ă1ă=Reset Configuration For This Channel
0ă0ă1ă0ă=Read Configuration For This Channel
0ă0ă1ă1ă=Write Configuration For This Channel
0ă1ă0ă0ă=50 Hz AĆC Line Frequency
0ă1ă0ă1ă=60 Hz AĆC Line Frequency
Register 31
Bits 0Ć15
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RW RW RW RW - - RW RW RW RW - - - - RW RW
Figure 4.10 Ć Configuration Command Register
When configuring a channel, you must define values for registers 23
through 30 before writing to register 31. Register 31 must be the last
register that you write to as you configure each channel.
When you are finished with register 31 for the channel you are
configuring, and the module has processed the information, the
module will set bit 15 of register 22 equal to one. You must then set
bits 12 to 15 of register 31 equal to zero. This places the module in
the READY state. The module then resets bit 15 of register 22, which
indicates that it is ready to configure another channel via register 31.
If you attempt to enter another command before resetting bits 12 to
15 of register 31, a configuration error will result in register 22.
Bits 0 and 1 specify what action should occur when an input value is
out of range. The default condition is to retain the old input value
from the channel data registers (0 to 15).
Bits 2 to 5 are reserved for future use.
Bit 6 defines whether or not cycle averaging is enabled for the
channel specified in register 23. The default condition (0) enables
cycle averaging.