Cypress CY7C1380C - Manual (Page 30)

CY7C1380C
CY7C1382C
Document #: 38-05237 Rev. *D Page 30 of 36
Read/Write Cycle Timing [21, 23, 24]
Note:
23. The data bus (Q) remains in high-Z following a WRITE cycle, unless a new read access is initiated by ADSP or ADSC.
24. GW is HIGH.
Switching Waveforms (continued)
tCYC
tCL
CLK
ADSP
tADH tADS
ADDRESS
tCH
OE
ADSC
CE
tAH tAS
A2
tCEH tCES
BWE,
BW X
Data Out (Q) High-Z
ADV
Single WRITE
D(A3)
A4 A5 A6
D(A5) D(A6) Data In (D)
BURST READ Back-to-Back READs
High-Z
Q(A2) Q(A1) Q(A4) Q(A4+1) Q(A4+2)
tWEH tWES
Q(A4+3)
tOEHZ
tDH tDS
tOELZ
tCLZ
tCO
Back-to-Back
WRITEs
A1
DON’T CARE UNDEFINED
A3
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