Kontron KTAM3874-pITX - Manual (Page 38)

KTD-S0057-I Page 34 Linux® Programming Examples (DebianTM)
KTAM3874/pITX Software Guide
if (munmap (map_base, MAP_SIZE) == -1) FATAL;
close (fd);
return 0;
}
The following lines demonstrate the access to an AM3874 register (all values are hexadecimal):
Read the GPIO port 0 debounce register ./devmem2 48032150
Enable debouncing of GP0[10] (write access) ./devmem2 48032150 d 400
ATTENTION
You need root rights for use of 'devmem2'.
10.1.1 Register Access Restrictions
The functionality of the GPIO connectors deserves special interest. You can use the respective device driver
interface or for more flexibility direct register access (e.g. with 'devmem2'). The table shows two cases
where the register access fails.
Function Short Desciption Memory Address Direct Access
I2C2 I 2 C TM - 3rd controller 0x4819C000 YES
SPI2 SPI TM - 3rd controller 0x481A2000 NO
SPI3 SPI TM - 4th controller 0x481A4000 NO
UART2 UART - 3rd controller 0x48024000 YES
UART4 UART - 5th controller 0x481A8000 YES
TIM4 Timer 4 0x48044000 YES
TIM5 Timer 5 0x48046000 YES
TIM6 Timer 6 0x48048000 YES
TIM7 Timer 7 0x4804A000 YES
The problem with the SPI
TM interface resides in the fact that outside of the device driver the clock domain is
disabled. You can solve this issue with the following register programming (needed root rights):
Enable clock domain in CM_ALWON_SPI_CLKCTRL ./devmem2 48181590 d 30002
Now all SPI TM registers are fully accessible.