ADLINK PCIe-7360 - Manual (Page 13)

Introduction 3
PCIe-7360
Buffer size
Digital input: 8k samples
Digital output: 20k samples
Data transfer
Software polling
Bus-mastering DMA with scatter-gather
Clock modes
Internal clock: up to 100 MHz
External clock: 200 MHz for DI, 100MHz for DO (see
Note)
Handshake
Burst handshake
Trigger source
Software
External digital signal
Pattern match
Trigger modes
Post trigger with re-trigger
Gate trigger
Input impedance 10 kΩ
Input protection
range
-1 to 6 V
Input protection
range
-1 to 6 V
Output impedance 50 Ω
Power-up initial
state
Tri-state/All digital inputs
Output protection
range
-0.5 V to 3.8 V
NOTE: NOTE:
External clock rate, which can be up to 200 MHz, only supports
8 or 16-bit data width