A.3 mode definition – ADLINK PCI-7300A User Manual
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• Appendix A 8254 Programmable Interval Timer
A.3 Mode Definition
In 8254, there are six different operating modes can be selected. They are:
•
Mode 0: Interrupt on terminal count
The output will be initially low after the mode set operation. After the 
count is loaded into the selected count register, the output will 
remain low and the counter will count. When terminal count is 
reached, the output will go high and remain high until the selected 
count register is reloaded with the mode or a new count is loaded. 
The counter continues to decrement after terminal count has been 
reached. 
Rewriting a counter register during counting results in the following:
(1) Write 1st byte stops the current counting. 
(2) Write 2nd byte starts the new count. 
•
Mode 1: Programmable One-Shot.
The output will go low on the count following the rising edge of the 
gate input. The output will go high on the terminal count. If a new 
count value is loaded while the output is low it will not affect the 
duration of the one-shot pulse until the succeeding trigger. The 
current count can be read at anytime without affecting the one-shot 
pulse. 
The one-shot is re-triggerable, hence the output will remain low for 
the full count after any rising edge of the gate input. 
•
Mode 2: Rate Generator.
Divided by N counter. The output will be low for one period of the 
input clock. The period from one output pulse to the next equals the 
number of input counts in the count register. If the count register is 
reloaded between output pulses the present period will not be 
affected, but the subsequent period will reflect the new value. 
The gate input when low, will force the output high. When the gate 
input goes high, the counter will start form the initial count. Thus, 
the gate input can be used to synchronized by software. 
When this mode is set, the output will remain high until after the 
count register is loaded. The output then can also be synchronized 
by software.