Lab.gruppen PLM 20K44 - Manual (Page 125)

120
Lake Controller Operation Manual Rev 1.5.4
Modules Menu Reference
8.2.1.1 Auto Detection
By default, the most appropriate digital clocks are automatically detected. The first valid clock in the order
of the list shown below is chosen to configure the Primary Clock as 48/96/192 kHz, and the SRC Clock as
44.1/88.2/176.4 kHz.
1. Host Word Clock (MY8-LAKE Only)
2. AES1 (In 1+2)
3. AES2 (In 3+4)
4. AES3 (In 5+6)
5. AES4 (In 7+8)
6. Internal Clock (88.2 or 96 kHz)
If a clock signal is not relevant for the product, or is not connected, or the signal has been temporarily lost,
the automatic detection process chooses the next valid clock source from the list, provided it matches the
selected base rate (either 44.1 or 48 kHz). If a valid clock source is detected from a source which is higher
on the list than the currently selected source, then the clock will switch to use the higher priority source.
The SRC Clock has two options for automatic clock
detection: Auto 44 and Auto 48. These settings provide
automatic detection within a particular range of frequen-
cies (either 44.1/88.2/176.4 kHz or 48/96/192 kHz)
8.2.1.2 Manual Config
For a fixed configuration, it is possible to fix the clock selection independently for each digital clock.
1. Tap the required clock from the CLOCK SOURCE SELECTOR at the bottom of the
DIGITAL CLOCK CONFIGURATION window.
2. Tap the icon showing the currently selected clock under the relevant clock heading in the top-left
(Primary) or top-right (SRC) sections of the window.
The larger icon in each of the windows shows the selected clock, and the associated text confirms the rates
that are available when using this clock for either inputs or outputs.
Manual configuration is neccessary when two asynchronous
base-48 kHz clock domains are connected to a device. In this
scenario, ensure that each digital clock, digital input and digital
output is manually forced to lock to the appropriate clock domain.