Altera Triple Speed Ethernet MegaCore Function - Manual (Page 15)

Table 1-2: Arria II GX Performance and Resource Utilization
The estimated resource utilization and performance of the Triple-Speed Ethernet MegaCore function for the Arria
II GX device family. The estimates are obtained by compiling the Triple-Speed Ethernet MegaCore function using
the Quartus II software targeting an Arria II GX (EP2AGX260EF29I3) device with speed grade -3.
Memory
(M9K Blocks/
M144K Blocks/
MLAB Bits)
Logic
Registers
Combina-
tional
ALUTs
FIFO Buffer
Size (Bits)
Settings MegaCore Function
26/0/1828 3947 3357 2048x32 RGMII
All MAC options enabled
Full and half-duplex modes
supported
10/100/1000-Mbps
Ethernet MAC
32/0/14624 22292 20201 — MII/GMII All MAC options
enabled
Full and half-duplex modes
supported
8-port 10/100/1000-
Mbps Ethernet
MAC
0/0/0 661 624 — 1000BASE-X
1000BASE-X/
SGMII PCS
1/0/160 1214 1191 — 1000BASE-X SGMII bridge
enabled PMA block (GXB)
Table 1-3: Stratix IV Performance and Resource Utilization
The estimated resource utilization and performance of the Triple-Speed Ethernet MegaCore function for the Stratix
IV device family. The estimates are obtained by compiling the Triple-Speed Ethernet MegaCore function using the
Quartus II software targeting a Stratix IV GX (EP4SGX530NF45C4) device with speed grade -4.
Memory
(M9K Blocks/ M144K
Blocks/MLAB Bits)
Logic
Registers
Combina-
tional ALUTs
FIFO Buffer
Size (Bits)
Settings MegaCore
Function
12/1/1408 2127 1410 2048x32 MII
Full and half-duplex modes
supported
10/100-
Mbps Small
MAC
12/1/128 1894 1157 2048x32 MII All MAC options enabled
12/1/176 1827 1160 2048x32 GMII All MAC options enabled
1000-Mbps
Small MAC
12/1/176 1861 1170 2048x32 RGMII All MAC options enabled
About This MegaCore Function Altera Corporation
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UG-01008
Performance and Resource Utilization 1-8
2014.06.30