Aplex Technology APC-3284A - Manual (Page 27)

APC-3x84A /APC-3x85AUser Manual 27
Processor Stepping 30661
Microcode Revision 269
L1 Cache RAM 2 x 56 k
L2 Cache RAM 2 x 512k
Processor Core Dual
Hyper-Threading Supported
Hyper-Threading:
[Enabled]
[Disabled]
Execute Disable Bit:
[Enabled]
[Disabled]
Limit CPUID Maximum:
[Disabled]
[Enabled]
3.4.4 Thermal Configuration
CPU Thermal Configuration
DTS SMM
[Disabled]
[Enabled]
Platform Thermal Configuration
Critical Trip Point [POR]
Active Trip Point Lo [55 C]
Active Trip Point Hi [71C]
Passive Trip Point [95]
Passive TC1 Value 1
Passive TC2 Value 5
Passive TSP Value 10
3.4.5 IDE Configuration
SATA Port0 Not Present
SATA Port1 Not Present
SATA Controller(S):
[Enabled]
[Disabled]