Document Outline

• Section III – Hardware Description
  • DOCUMENT ORGANIZATION
  • DOCUMENT HISTORY
  • CONTENTS
  • TABLES
  • FIGURES
  • ABBREVIATIONS
• 1 Overview
  • 1.1 Frame processing order
  • 1.2 Scope of this document
  • 1.3 Revision/Build History
• 2 Features and Registers
  • 2.1 Features
  • 2.2 Registers
• 3 Pin Description
  • 3.1 Overview
    • 3.1.1 Pin Overview
    • 3.1.2 Signal Overview
    • 3.1.3 PDI Signal Overview
  • 3.2 Configuration Pins
    • 3.2.1 Port Mode
    • 3.2.2 Port Configuration
      • 3.2.2.1 Configurations with 2 ports
      • 3.2.2.2 Configurations with 3 ports
      • 3.2.2.3 Configurations with 4 ports
    • 3.2.3 CPU_CLK MODE
    • 3.2.4 TX Shift
    • 3.2.5 CLK25OUT2 Enable
    • 3.2.6 Transparent Mode Enable
    • 3.2.7 Digital Control/Status Move
    • 3.2.8 PHY Address Offset
    • 3.2.9 Link Polarity
    • 3.2.10 SII EEPROM Size
    • 3.2.11 Reserved
  • 3.3 General ET1100 Pins
  • 3.4 SII EEPROM Interface Pins
  • 3.5 MII Management Pins
  • 3.6 Distributed Clocks SYNC/LATCH Pins
  • 3.7 LED Signals
  • 3.8 Physical Ports and PDI Pins
    • 3.8.1 Physical Port Signals
    • 3.8.2 MII Interface
      • 3.8.2.1 CLK25OUT1/2 Signals
    • 3.8.3 EBUS Interface
    • 3.8.4 PDI Pins
    • 3.8.5 Physical Port 0
    • 3.8.6 Physical Port 1
    • 3.8.7 Physical Port 2 / PDI byte 4
    • 3.8.8 Physical Port 3 / PDI Bytes 2/3
    • 3.8.9 PDI Bytes 0/1
  • 3.9 PDI Signal Pinout depending on selected PDI
    • 3.9.1 Digital I/O Pin Out
    • 3.9.2 8/16 Bit asynchronous µController
    • 3.9.3 8/16 Bit synchronous µController
    • 3.9.4 SPI Pin Out
  • 3.10 Power Supply
    • 3.10.1 I/O Power Supply
    • 3.10.2 Logic Core Power Supply
    • 3.10.3 PLL Power Supply
  • 3.11 Reserved Pins
• 4 MII Interface
  • 4.1 MII Interface Signals
  • 4.2 PHY Address Configuration
  • 4.3 TX Shift Compensation
  • 4.4 Timing specifications
• 5 EBUS/LVDS Interface
  • 5.1 EBUS Interface Signals
• 6 PDI description
  • 6.1 PDI Deactivated
  • 6.2 Digital I/O Interface
    • 6.2.1 Interface
    • 6.2.2 Configuration
    • 6.2.3 Digital Inputs
    • 6.2.4 Digital Outputs
    • 6.2.5 Bidirectional mode
    • 6.2.6 Output Enable/Output Configuration
    • 6.2.7 SyncManager Watchdog
    • 6.2.8 SOF
    • 6.2.9 OUTVALID
    • 6.2.10 EEPROM_LOADED
    • 6.2.11 Timing specifications
  • 6.3 SPI Slave Interface
    • 6.3.1 Interface
    • 6.3.2 Configuration
    • 6.3.3 SPI access
    • 6.3.4 Commands
    • 6.3.5 Address modes
    • 6.3.6 Interrupt request register (AL Event register)
    • 6.3.7 Write access
    • 6.3.8 Read access
      • 6.3.8.1 Read Wait State
      • 6.3.8.2 Read Termination
    • 6.3.9 SPI access errors and SPI status flag
    • 6.3.10 EEPROM_LOADED
    • 6.3.11 2 Byte and 4 Byte SPI Masters
    • 6.3.12 Timing specifications
  • 6.4 Asynchronous 8/16 bit µController Interface
    • 6.4.1 Interface
    • 6.4.2 Configuration
    • 6.4.3 µController access
    • 6.4.4 Write access
    • 6.4.5 Read access
    • 6.4.6 µController access errors
    • 6.4.7 EEPROM_LOADED
    • 6.4.8 Connection with 16 bit µControllers without byte addressing
    • 6.4.9 Connection with 8 bit µControllers
    • 6.4.10 Timing Specification
  • 6.5 Synchronous 8/16 bit µController Interface
    • 6.5.1 Interface
    • 6.5.2 Configuration
    • 6.5.3 µController access
    • 6.5.4 µController connection using Byte Select signals (BSn)
    • 6.5.5 µController connection using Transfer Size signals (SIZ)
    • 6.5.6 Write access
    • 6.5.7 Read access
    • 6.5.8 µController access errors
    • 6.5.9 EEPROM_LOADED
    • 6.5.10 Timing Specification
• 7 Distributed Clocks SYNC/LATCH Signals
  • 7.1 Signals
  • 7.2 Timing specifications
• 8 SII EEPROM Interface (I²C)
  • 8.1 Signals
  • 8.2 Timing specifications
• 9 Example Schematics
  • 9.1 Clock source
  • 9.2 Power supply
  • 9.3 Dual purpose configuration input/LED output pins
  • 9.4 PHY Connection
  • 9.5 LVDS termination
  • 9.6 RBIAS resistor
  • 9.7 Reset Logic
  • 9.8 Transparent Mode
• 10 Electrical Specifications and Timings
  • 10.1 Absolute Maximum Ratings
  • 10.2 Electrical Characteristics
• 11 Mechanical Specifications
  • 11.1 Package Information
  • 11.2 Tape and Reel Information
  • 11.3 Moisture Sensitivity and Storage
  • 11.4 Soldering Profile
  • 11.5 Ordering codes
• 12 Appendix
  • 12.1 Support and Service
    • 12.1.1 Beckhoff’s branch offices and representatives
  • 12.2 Beckhoff Headquarters