Fpga pinout – Sundance SMT338-VP User Manual
Page 16
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FPGA pinout
FPGA pinout is gathered in a Xilinx User Constraint File (ucf).
Naming convention is described below for SHB and SLB. Other signals are directly
commented in the UCF file itself.
SHB Pinout (LVTTL only)
The following provides naming convention for SHB signals.
Pin2
Integ
ral G
round
plan
e
Pin 1
Alig
nme
nt P
in
Blade
and
Beam
Desig
n
0.5
m
m
Figure 6: Top view QSH 30
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