Verilink DDS Lite (34-00295.C) Product Manual - Manual (Page 15)

Configuration 9
SW1 and SW2 are two 8 - position DIP switches located on the
side of the unit. These switches provide the following
configuration parameters.
Network Bit
Rate Select
Positions SW1 - 1, SW1 - 2, and SW1- 3 are used to set the
network bit rate. Refer to the table shown in the upper left of
Figure 2-1 to determine the switch settings for a particular bit
rate. RTS -to- CTS delays double when position SW1 -8 is in the
B position.
V.54 Loop
Operation Position SW1-4 is used to enable or disable V.54 loop operation.
A - Disabled B - Enabled
Data Polarity SW1 -5 is used to determine whether data bits are inverted. In
the A position, marks equal pulses. In the B position, spaces
equal pulses. Receipt of OOF, OOS, idle, or loop codes forces
the DSU data to all marks (A position) or spaces (B position).
A - Normal B - Inverted
Circuit
Assurance
When SW1 - 6 is in position B, the status of CF (receive line
signal detector) and CA (request to send) controls the output CB
(clear to send). If either CA or CF is Off, CB is Off. If CA and
CF are On, CB is On.
A - Off B - On
CTS Control When SW1 - 7 is in position B, CTS is forced On regardless of
the RTS input status. In the A position, the delays are determined
by SW1 - 8.
A - CTS normal B - CTS forced On
RTS- to- CTS
Delay
When SW1 - 8 is in the A position, the RTS -to- CTS delay is as
shown in the table shown in the upper left of Figure 2-1. In the
B position, the delays double.
A - The normal Delay B - Twice the normal delay
Synchronous /
Asynchronous
Data
When SW2-1 is in the A position, the unit operates in
Synchronous mode. This switch must be in position B for
switches SW2 -2 and SW2- 3 to function. When in position B,
the unit operates in Asynchronous mode. In Asynchronous mode,
data functions at 2.4, 4.8, 9.6, 19.2, and 38.4 kbps.
A - Synchronous B - Asynchronous