Chapter 2, Motherboard information – Lanner FW-7582 User Manual

Page 15

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11

Motherboard Information

Chapter 2

Network Application Platforms

Power Debug Port(psvid_p1)

Selection between PCI-E Reset and System Reset (J16):

A 1x3 (2.54mm) pin header for PCI-E reset and system

reset function.

Front LCD Module Connector(J14): A 2x5 (2.00mm) pin

header for connecting the front system LCD display.

Hardware or Software Reset Jumper(J13, right next to

SW2): The jumper can be adjusted to be in either hardware

or software reset mode when the reset switch is pressed.

The hardware reset will reboot the system without turning

off the power. The software reset can be programmed to

reset software to its default settings.

Clear CMOS jumper (J8): It is for clearing the CMOS

memory and system setup parameters by erasing the data

stored in the CMOS RAM such as the system passwords.

DIMM Socket (J3, J4): The 240-pin DDR3 DIMM is for

connecting the DDR3 1066/1333 memory. The system

can support up to 16 GB in maximum and Dual-channel

architecture. Dual channel doubles data throughput

from the memory to the memory controller by maximize

memory throughput from 64-bit buses to 128-bit bus.
SATA 1 and 2 Connectors (SATA1, SATA2): It is for

connecting a 2.5’’ SATA hard disk to be served as your

system’s storage. The system can support a maximum of

2 disks. It conforms with SATA II (3.0 Gbs).

Console Port Cconnector (COMB1)

SPI-ROM Update Connector (SPI-ROM1): Using the

appropriate cable to connect this 10-pin ISP header

connector, the SPI Flash soldered on board can be

updated.

LPC I/O bus (Port 80) (LPC1): A 2x5 Pin Header 2.00mm.

It is a proprietary connector for connecting a checkpoint

device to output checkpoints throughout bootblock and

Power-On Self Test (POST) to indicate the task the system

is currently executing.

3 2 1

Pin No.

Function

Pin No.

Function

1

SPI_HD1_N

2

PCH_SPI_CS1_N

3

SPI_CS0

4

V_3P3_SPI

5

SPI_ICH_MISO_R

6

SPI_HOLD0_L

7

NC

8

SPI_ICH_CLK_R

9

Ground

10

SPI_ICH_MOSI_R

10
8
6
4
2

9
7
5
3
1

Pin No.

Function

PIN NO.

DESCRIPTION

1

+5V

2

Ground

3

LSLIN#

4

VEE

5

LAFD#

6

LINIT#

7

FL_PD1

8

FL_PD0

9

FL_PD3

10

FL_PD2

11

FL_PD5

12

FL_PD4

13

FL_PD7

14

FL_PD6

15

LCD-

16

+5V

17

KPA1

18

KPA2

19

KPA3

20

KPA4

21

LCM_RST

22

CTR-GRN

23

CTR-YEW

24

HDDLED_N

Pin No.

Function

1-2

SYSTEM RESET

2-3

PCI-E Reset (Default)

3 2 1

Pin No.

Function

1

GND

2

TX_P

3

TX_M

4

GND

5

RX_M

6

RX_P

7

GND

Pin No.

Function

1

H_VIDALERT_VR

2

H_VIDSOUT_VR

3

H_VIDSCK_VR

4

GND

Pin No.

Function

1-2

Hardware reset

2-3

Software reset (default)

Pin No.

Function

1-2

Normal (Default)

2-3

Clear CMOS

23 21 19 17 15 13 11 9 7 5 3 1

24 22020 18 16 14 12 10 8 6 4 2

3 2 1

1 2 3 4 5 6 7

1
2
3
4

Pin No.

Function

Pin No.

Function

1

Request To Send

(RTSB#)

2

Data Terminal

Ready (DTRB#)

3

Transmit Data (TXDB)

4

GND

5

GND

6

Receive Data

(RXDB)

7

Data Set Ready

(DSRB #)

8

Clear To Send

(CTSB #)

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