Linx Technologies LICAL-EDC-DS - Manual (Page 5)

– – – – 4 5
P_SEL
D0
D1
D2
D3
D4
D5
GND
D6
D7
DOUT/VT
TE/DIN
A9
A8
A7
A6
A5
A4
VCC
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
E/D_SEL
D_CFG
A_CFG0
A_CFG1 A3
A2
A1
A0
Figure 5: DS Series Encoder/Decoder Pinout (Top View)
Figure 6: DS Series Encoder/Decoder Pin Descriptions
Pin Assignments Pin Descriptions
Pin Descriptions
Pin Number Name I/O Description
1 P_SEL I
Protocol Selection. The state of this line
determines the data structure and protocol used
by the encoder / decoder. Pull low to use the
Holtek data structure, pull high to use the serial
structure.
2, 3, 4, 5, 6,
7, 9, 10
D0 – D7 I/O
Data Lines. When in Encoder Mode, the states
of these lines are captured when the TE line goes
high and are encoded for transmission. When in
Decoder Mode, these lines reproduce the states
of the encoder’s data lines upon reception of a
valid packet.
8, 19 GND Ground
11 E/D_SEL I
Encoder/Decoder Select. The state of this line
determines if the DS is an encoder or a decoder.
If the line is high, then the DS enters Encoder
Mode. If the line is low, then it enters Decoder
Mode. This line is checked once upon power up.
12 D_CFG I
Data Line Configuration. Determines whether a
low on a data line is interpreted as a zero bit or
an open bit. See the Input Type Selection section.
13 A_CFG0 I
Address Configuration 0. With A_CFG1,
determines the address bit type interpretation.
See the Input Type Selection section.
14 A_CFG1 I
Address Configuration 1. With A_CFG0,
determines the address bit type interpretation.
See the Input Type Selection section.
15, 16, 17,
18, 21, 22,
23, 24, 25, 26
A0–A9 I
Address Lines. The DS has ten address lines that
are used to set a local address.
20 VCC This is the positive power supply.
27 TE/DIN I
When in Encoder Mode, this line is the Transmit
Enable line. When it is pulled high, the encoder
records the states of the data and address lines,
assembles them into a packet, and outputs the
packet on the DOUT line three times. When in
Decoder Mode, this line is the data input from the
receiver.
28 DOUT/VT O
When in Encoder Mode, this line is the data
output that is connected to the transmitter. When
in Decoder Mode, this line is the Valid Transmit
indicator and goes high when a valid packet is
received.
Warning: None of the input lines have internal pull-up or pull-down
resistors. The input lines must always be in a known state (either
GND or V
CC
) at all times or the operation may not be predictable. The
designer must ensure that the input lines are never floating, either by
using external resistors, by tying the lines directly to GND or V
CC
, or by
use of other circuits to control the line state.