2 benefits of ultra, ultra2, and ultra3 scsi, Benefits of ultra, ultra2, and ultra3 scsi – Avago Technologies LSI53C1010 User Manual
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Benefits of Ultra, Ultra2, and Ultra3 SCSI
1-7
1.2 Benefits of Ultra, Ultra2, and Ultra3 SCSI
Ultra SCSI is an extension of the SCSI-3 standard that expands the
bandwidth of the SCSI bus and allows faster synchronous SCSI transfer
rates. When enabled, Ultra SCSI performs 20 megatransfers per second,
which results in approximately doubling the synchronous transfer rates of
Fast SCSI-2. The LSI53C860 and LSI53C875 can perform 8-bit or
16-bit Ultra SCSI synchronous transfers as fast as 20 Mbytes/s or
40 Mbytes/s.
Ultra2 SCSI extends SCSI performance beyond Ultra SCSI rates, up to
40 megatransfers per second. It also defines a new physical interface,
LVD SCSI, that retains the reliability of HVD SCSI while allowing a longer
cable and more devices on the bus than Ultra SCSI. The LSI53C895 can
perform 16-bit, Ultra2 SCSI synchronous transfers as fast as
80 Mbytes/s.
Ultra3 SCSI delivers data up to two times faster than Ultra2 SCSI.
Ultra3 SCSI is an extension of the SPI-3 draft standard. When enabled,
Ultra3 SCSI performs 80 megatransfers per second. Ultra3 data transfer
speed is accomplished using Double Transition (DT) clocking. Data is
clocked on both rising and falling edges of the request and acknowledge
signals, doubling data transfer speeds without increasing the clock rate.
The advantages of Ultra/Ultra2/Ultra3 SCSI are most noticeable in
heavily loaded systems, or large block size applications such as video on
demand and image processing. Not only does it significantly improve
SCSI bandwidth, it also preserves existing hardware and software
investments. LSI Logic Ultra/Ultra2/Ultra3 SCSI chips are all compatible
with Fast SCSI software; the only changes required are to enable the
chip to negotiate for the faster synchronous transfer rates.
Some changes to existing cabling or system designs may be needed to
maintain signal integrity at Ultra SCSI synchronous transfer rates. These
design issues are discussed in the chip technical manuals.