7 a.c. characteristics, 1 bus interface timing, 1 sh-4 interface timing – Epson S1D13705 User Manual
Page 32: Figure 71: sh-4 timing, Bus interface timing, Sh-4 interface timing, Figure 7-1: sh-4 timing
Page 26
Epson Research and Development
Vancouver Design Center
S1D13705
Hardware Functional Specification
X27A-A-001-10
Issue Date: 02/02/01
7 A.C. Characteristics
Conditions: IO V
DD
= 2.7 V to 5.0 V
T
A
= -40
°
C to 85
°
C
T
rise
and
T
fall
for all inputs must be < 5 nsec (10% ~ 90%)
C
L
= 60pF (Bus/MPU Interface)
C
L
= 60pF (LCD Panel Interface)
7.1 Bus Interface Timing
7.1.1 SH-4 Interface Timing
Figure 7-1: SH-4 Timing
Note
The SH-4 Wait State Control Register for the area in which the S1D13705 resides must be set to
a non-zero value. The SH-4 read-to-write cycle transition must be set to a non-zero value
(with reference to BUSCLK).
RDY#
T
CKIO
t2 t3
t4
t11
t12
t17
t5
t6
t7
t8
t9
t13
t18
t15
t16
CKIO
A[16:0], M/R#
CSn#
RD/WR#
RD#
D[15:0]
BS#
WEn#
D[15:0]
Hi-Z
Hi-Z
Hi-Z
Hi-Z
VALID
(write)
(read)
t10
t14