Document Outline

• 1 INTRODUCTION
  • 1.1 Features
  • 1.2 Block Diagram
  • 1.3 Pins
    • 1.3.1 Pin layout diagram
    • 1.3.2 Pin description
  • 1.4 Mask Option
• 2 POWER SUPPLY
  • 2.1 Operating Voltage
  • 2.2 Internal Power Supply Circuit
• 3 CPU AND BUS CONFIGURATION
  • 3.1 CPU
  • 3.2 Internal Memory
    • 3.2.1 Program ROM
    • 3.2.2 RAM
    • 3.2.3 I/O memory
    • 3.2.4 Display memory
    • 3.2.5 Kanji font ROM
  • 3.3 Exception Processing Vectors
  • 3.4 CC (Customized Condition Flag)
  • 3.5 Chip Mode
    • 3.5.1 MCU mode and MPU mode
    • 3.5.2 Bus mode
    • 3.5.3 CPU mode
  • 3.6 External Bus
    • 3.6.1 Data bus
    • 3.6.2 Address bus
    • 3.6.3 Read (RD)/write (WR) signals
    • 3.6.4 Chip enable (CE) signal
    • 3.6.5 WAIT control
    • 3.6.6 Bus authority release state
• 4 INITIAL RESET
  • 4.1 Initial Reset Factors
    • 4.1.1 RESET terminal
    • 4.1.2 Simultaneous LOW level input at input port terminals K00-K03
    • 4.1.3 Initial reset sequence
  • 4.2 Initial Settings After Initial Reset
• 5 PERIPHERAL CIRCUITS AND THEIR OPERATION
  • 5.1 I/O Memory Map
  • 5.2 System Controller and Bus Control
    • 5.2.1 Bus mode and CPU mode settings
    • 5.2.2 Address decoder (CE output) settings
    • 5.2.3 WAIT state settings
    • 5.2.4 Setting the bus authority release request signal
    • 5.2.5 Stack page setting
    • 5.2.6 Control of system controller
    • 5.2.7 Programming notes
  • 5.3 Watchdog Timer
    • 5.3.1 Configuration of watchdog timer
    • 5.3.2 Interrupt function
    • 5.3.3 Control of watchdog timer
    • 5.3.4 Programming notes
  • 5.4 Oscillation Circuits
    • 5.4.1 Configuration of oscillation circuits
    • 5.4.2 Mask option
    • 5.4.3 OSC1 oscillation circuit
    • 5.4.4 OSC3 oscillation circuit
    • 5.4.5 Switching the CPU clocks
    • 5.4.6 Control of oscillation circuit
    • 5.4.7 Programming notes
  • 5.5 Input Ports (K ports)
    • 5.5.1 Configuration of input ports
    • 5.5.2 Mask option
    • 5.5.3 Pull-up control
    • 5.5.4 Interrupt function and input comparison register
    • 5.5.5 Control of input ports
    • 5.5.6 Programming notes
  • 5.6 Output Ports (R ports)
    • 5.6.1 Configuration of output ports
    • 5.6.2 High impedance control
    • 5.6.3 DC output
    • 5.6.4 Control of output ports
  • 5.7 I/O Ports (P ports)
    • 5.7.1 Configuration of I/O ports
    • 5.7.2 Mask option
    • 5.7.3 I/O control registers and I/O mode
    • 5.7.4 Pull-up control
    • 5.7.5 Special output
    • 5.7.6 Control of I/O ports
    • 5.7.7 Programming notes
  • 5.8 Serial Interface
    • 5.8.1 Configuration of serial interface
    • 5.8.2 Switching of terminal functions
    • 5.8.3 Transfer modes
    • 5.8.4 Clock source
    • 5.8.5 Transmit-receive control
    • 5.8.6 Operation of clock synchronous transfer
    • 5.8.7 Operation of asynchronous transfer
    • 5.8.8 Interrupt function
    • 5.8.9 Control of serial interface
    • 5.8.10 Programming notes
  • 5.9 Clock Timer
    • 5.9.1 Configuration of clock timer
    • 5.9.2 Interrupt function
    • 5.9.3 Control of clock timer
    • 5.9.4 Programming notes
  • 5.10 Programmable Timer
    • 5.10.1 Configuration of programmable timer
    • 5.10.2 Operation mode
    • 5.10.3 Setting of input clock
    • 5.10.4 Operation and control of timer
    • 5.10.5 Interrupt function
    • 5.10.6 Setting of TOUT output
    • 5.10.7 Transfer rate setting of serial interface
    • 5.10.8 Setting frame frequency for LCD driver
    • 5.10.9 Control of programmable timer
    • 5.10.10 Programming notes
  • 5.11 LCD Driver
    • 5.11.1 Configuration of LCD driver
    • 5.11.2 LCD power supply
    • 5.11.3 Frame frequency
    • 5.11.4 Switching drive duty
    • 5.11.5 Display memory
    • 5.11.6 Display control
    • 5.11.7 Control of LCD driver
    • 5.11.8 Programming notes
  • 5.12 Supply Voltage Detection (SVD) Circuit
    • 5.12.1 Configuration of SVD circuit
    • 5.12.2 SVD operation
    • 5.12.3 Control of SVD circuit
    • 5.12.4 Programming notes
  • 5.13 Heavy Load Protection Function
    • 5.13.1 Outline of heavy load protection function
    • 5.13.2 Control of heavy load protection function
    • 5.13.3 Programming note
  • 5.14 Interrupt and Standby Status
    • 5.14.1 Interrupt generation conditions
    • 5.14.2 Interrupt factor flag
    • 5.14.3 Interrupt enable register
    • 5.14.4 Interrupt priority register and interrupt priority level
    • 5.14.5 Exception processing vectors
    • 5.14.6 Control of interrupt
    • 5.14.7 Programming notes
• 6 SUMMARY OF NOTES
  • 6.1 Notes for Low Current Consumption
  • 6.2 Precautions on Mounting
• 7 BASIC EXTERNAL WIRING DIAGRAM
• 8 ELECTRICAL CHARACTERISTICS
  • 8.1 Absolute Maximum Rating
  • 8.2 Recommended Operating Conditions
  • 8.3 DC Characteristics
  • 8.4 Analog Circuit Characteristics
  • 8.5 Power Current Consumption
  • 8.6 AC Characteristics
  • 8.7 Oscillation Characteristics
  • 8.8 Characteristics Curves (reference value)
• 9 PACKAGE
  • 9.1 Plastic Package
  • 9.2 Ceramic Package for Test Samples
• 10 PAD LAYOUT
  • 10.1 Diagram of Pad Layout
  • 10.2 Pad Coordinates
• APPENDIX A S5U1C88000P1&S5U1C88649P2 MANUAL (Peripheral Circuit Board for S1C88650)
  • A.1 Names and Functions of Each Part
  • A.2 Precautions
    • A.2.1 Precaution for operation
    • A.2.2 Differences from actual IC
  • A.3 Connecting to the Target System
  • A.4 Product Specifications
• APPENDIX B USING KANJI FONT