Epson S1C88650 - Manual (Page 141)

S1C88650 TECHNICAL MANUAL EPSON 133
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Interrupt and Standby Status)
5.14.6 Control of interrupt
Table 5.14.6.1 shows the interrupt control bits.
Table 5.14.6.1(a) Interrupt control bits
SR R/W Address Bit Name Function Comment 1 0
00FF20 D7
D6
D5
D4
D3
D2
D1
D0
PK01
PK00
PSIF1
PSIF0
–
–
PTM1
PTM0
Constantly "0" when
being read
0
0
–
–
0
R/W
R/W
R/W
–
–
–
–
K00–K07 interrupt priority register
Serial interface interrupt priority register
–
–
Clock timer interrupt priority register
00FF21 D7
D6
D5
D4
D3
D2
D1
D0
–
–
PPT3
PPT2
PPT1
PPT0
–
–
Constantly "0" when
being read
Constantly "0" when
being read
–
–
–
–
–
–
–
–
–
–
–
–
–
PPT3
PPT1
1
1
0
0
PPT2
PPT0
1
0
1
0
–
–
Programmable timer 3–2 interrupt
priority register
Programmable timer 1–0 interrupt
priority register
–
–
Priority
level
PK01
PSIF1
1
1
0
0
Priority
level
PK00
PSIF0
1
0
1
0
Level 3
Level 2
Level 1
Level 0
Level 3
Level 2
Level 1
Level 0
0
0
R/W
R/W
PTM1
1
1
0
0
Priority level PTM0
1
0
1
0 Level 3
Level 2
Level 1
Level 0
00FF2A D7
D6
D5
D4
D3
D2
D1
D0
–
–
–
–
PPT7
PPT6
PPT5
PPT4
Constantly "0" when
being read
–
–
–
–
0
0
R/W
R/W
–
–
–
–
–
–
–
–
PPT7
PPT5
1
1
0
0
PPT6
PPT4
1
0
1
0
Priority
level
Level 3
Level 2
Level 1
Level 0
00FF22 D7
D6
D5
D4
D3
D2
D1
D0
–
–
–
–
ETM32
ETM8
ETM2
ETM1
–
–
–
–
Clock timer 32 Hz interrupt enable register
Clock timer 8 Hz interrupt enable register
Clock timer 2 Hz interrupt enable register
Clock timer 1 Hz interrupt enable register
–
–
–
–
0 R/W
–
–
–
–
Interrupt
enable
–
–
–
–
Interrupt
disable
Constantly "0" when
being read
–
–
–
–
Programmable timer 7–6 interrupt
priority register
Programmable timer 5–4 interrupt
priority register
D7
D6
D5
D4
D3
D2
D1
D0
00FF23 –
–
–
–
–
ESERR
ESREC
ESTRA
–
–
–
–
–
Serial I/F (error) interrupt enable register
Serial I/F (receiving) interrupt enable register
Serial I/F (transmitting) interrupt enable register
–
–
–
–
–
0
–
–
–
–
–
Interrupt
enable
–
–
–
–
–
Interrupt
disable
Constantly "0" when
being read
R/W