Epson S1C88650 - Manual (Page 109)

S1C88650 TECHNICAL MANUAL EPSON 101
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer)
Table 5.10.9.1(g) Programmable timer control bits
SR R/W Address Bit Name Function Comment 1 0
D7
D6
D5
D4
D3
D2
D1
D0
CDR57
CDR56
CDR55
CDR54
CDR53
CDR52
CDR51
CDR50
PTM5 compare data D7 (MSB)
PTM5 compare data D6
PTM5 compare data D5
PTM5 compare data D4
PTM5 compare data D3
PTM5 compare data D2
PTM5 compare data D1
PTM5 compare data D0 (LSB)
0 R/W High Low
00FFB5
D7
D6
D5
D4
D3
D2
D1
D0
CDR47
CDR46
CDR45
CDR44
CDR43
CDR42
CDR41
CDR40
PTM4 compare data D7 (MSB)
PTM4 compare data D6
PTM4 compare data D5
PTM4 compare data D4
PTM4 compare data D3
PTM4 compare data D2
PTM4 compare data D1
PTM4 compare data D0 (LSB)
0 R/W High Low
00FFB4
D7
D6
D5
D4
D3
D2
D1
D0
PTM57
PTM56
PTM55
PTM54
PTM53
PTM52
PTM51
PTM50
PTM5 data D7 (MSB)
PTM5 data D6
PTM5 data D5
PTM5 data D4
PTM5 data D3
PTM5 data D2
PTM5 data D1
PTM5 data D0 (LSB)
1 R High Low
00FFB7
D7
D6
D5
D4
D3
D2
D1
D0
PTM47
PTM46
PTM45
PTM44
PTM43
PTM42
PTM41
PTM40
PTM4 data D7 (MSB)
PTM4 data D6
PTM4 data D5
PTM4 data D4
PTM4 data D3
PTM4 data D2
PTM4 data D1
PTM4 data D0 (LSB)
1 R High Low
00FFB6
D7
D6
D5
D4
D3
D2
D1
D0
00FFB8 MODE16_D
PTNREN_D
–
–
–
PTRUN6
PSET6
CKSEL6
"0" when being read
Reserved register
"0" when being read
0
0
–
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
W
R/W
PTM6–7 8/16-bit mode selection
External clock 3 noise rejecter selection
–
R/W register
R/W register
PTM6 Run/Stop control
PTM6 preset
PTM6 input clock selection
16 - bit x 1
Enable
–
1
1
Run
Preset
External clock
8 - bit x 2
Disable
–
0
0
Stop
No operation
Internal clock
00FFB9 D7
D6
D5
D4
D3
D2
D1
D0
–
–
–
–
–
PTRUN7
PSET7
CKSEL7
–
–
–
R/W register
R/W register
PTM7 Run/Stop control
PTM7 preset
PTM7 input clock selection
Constantly "0" when
being read
Reserved register
"0" when being read
–
–
–
0
0
0
0
0
R/W
R/W
R/W
W
R/W
–
–
–
0
0
Stop
No operation
Internal clock
–
–
–
1
1
Run
Preset
External clock