7 indexed, 9-bit offset, Indexed, 9-bit offset – Motorola HC12 User Manual

Page 135

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Assembler Syntax

Source Line

MCUez HC12 Assembler

User’s Manual

MOTOROLA

Assembler Syntax

135

7.4.3.7 Indexed, 9-Bit Offset

This addressing mode adds a 9-bit signed offset to the base index register to
form the memory address, which is referenced in the instruction. The valid
range for a 9-bit signed offset is [–256...255]. The base index register may be
X, Y, SP, PC, or PCR.

For information about indexed PC and indexed PC relative addressing modes,
see

7.4.3.16 Indexed PC versus Indexed PC Relative Addressing Mode

.

This addressing mode may be used to access elements in an n-element table,
whose size is smaller than 256 bytes.

Example:

ORG $1000

CST_TBL: DC.B $5, $10, $18, $20, $28, $30, $38, $40, $48

DC.B $50, $58, $60, $68, $70, $78, $80, $88, $90

DC.B $98, $A0, $A8, $B0, $B8, $C0, $C8, $D0, $D8

ORG $800

DATA_TBL: DS.B 40

main:

LDX #$CST_TBL

LDAA 20,X

LDY #DATA_TBL

STAA 18, Y

Accumulator A is loaded with the byte value stored in memory location $1014
($1000 +20).

Then the value of accumulator A is stored at address $812 ($800 +18).

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