16 serial peripheral interface (spi) interface, Table 18 – Marvel Group Integrated Controller 88F6281 User Manual

Page 41

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Pin and Signal Descriptions

Pin Descriptions

Copyright © 2008 Marvell

Doc. No. MV-S104859-U0 Rev. E

December 2, 2008, Preliminary

Document Classification: Proprietary Information

Page 41

1.2.16

Serial Peripheral Interface (SPI) Interface

Note

All of the SPI signals are multiplexed on the MPP pins (see

Section 4, Pin Multiplexing,

on page 51

).

Table 18: Serial Peripheral Interface (SPI) Interface Signal Assignment

Pin Name

I/O

Pin Type

Power Rail

Description

SPI_MOSI

1

O

CMOS

VDDO

SPI Data Output
Data is output from the master and input to the slave.

SPI_MISO

2

I

CMOS

VDDO

SPI Data Input
Data is input to the master and output from the slave.

SPI_SCK

O

CMOS

VDDO

SPI Clock

SPI_CSn

O

CMOS

VDDO

SPI Chip Select
NOTE: This pin requires an external pull up.

1. MOSI = Master Out Slave In.

2. MISO = Master In Slave Out.

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